1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device, and more particularly, to a bipolar device and a method of manufacturing the same including pre-treatment using germane (GeH4) gas on a single crystalline silicon layer before formation of a polysilicon emitter region on the single crystalline silicon layer.
2. Description of the Related Art
A bipolar device is a transistor including a collector, a base, and an emitter and functions as a switching device or an amplifier in a logic device. In particular, a bipolar device employed in mobile phones or the like requires high operating speed and stable dispersion of current gains.
FIG. 1 is a schematic cross-sectional view of a typical bipolar device in which an undesired oxide layer is formed. FIG. 2 is a schematic cross-sectional view of a typical bipolar device in which undesired Si-rearrangement occurs.
Referring to FIG. 1, the typical bipolar device comprises a collector region 20 formed on a silicon substrate and a base region 30 and an emitter region (40 of FIG. 2), which are formed on the collector region 20. While the emitter region 40 is formed of a polysilicon layer, the base region 30 is formed of a single crystalline silicon layer. Here, spacers 50 for insulation may be formed on sides of the emitter region 40.
The characteristics of an interface between the emitter region 40 formed of polysilicon and the base region 30 formed of single crystalline silicon affect the operating characteristics of the bipolar device, such as operating speed and/or dispersion of current gains.
More specifically; after forming a single crystalline silicon layer for the base region 30, a spacer layer is formed using silicon nitride on the single crystalline silicon layer. Next, the spacer layer is patterned so as to form a contact hole 51 exposing a portion of the base region 30 formed of single crystalline silicon. Here, an undesired oxide layer 60, i.e., a natural oxide layer or a residual oxide layer, may remain on the exposed portion of the base region 30.
If a polysilicon layer for the emitter region (40 of FIG. 2) is formed on this oxide layer 60, contact resistance between the polysilicon layer for the emitter region 40 and the single crystalline silicon layer for the base region 30 adversely increases due to the oxide layer 60. Such an increase in the contact resistance may increase dispersion of current gains and 1/f noise and cause a voltage drop in the operation of the bipolar device. Accordingly, a method of removing the oxide layer 60 is needed.
Referring to FIG. 2, a polysilicon layer for the emitter region 40 is formed to contact a single crystalline silicon layer for the base region 30. Thus, Si-rearrangement may unfortunately occur in an interface 35 between the polysilicon layer 40 and the single crystalline silicon layer 30. The Si-rearrangement may occur while the polysilicon layer is being deposited to fill the contact hole 51 formed in spacers 50 or during a subsequent thermal process.
The Si-rearrangement refers to a phenomenon that silicon atoms in a contact area between the silicon crystalline silicon layer 30 and the polysilicon layer 40 are rearranged in the same arrangement as single crystalline atoms. Thus, a single crystalline silicon region grows in the polysilicon layer 40. As a result, the thickness of the single crystalline silicon layer 30 becomes thicker in the same manner as when the single crystalline silicon layer 30 is re-grown.
By the Si-rearrangement, when a bipolar transistor operates, the effective emitter region 40 decreases and the effective base region 30 expands. This reduces current gains in the bipolar transistor, thus lowering the hFE value of the resulting transistor. For this reason, the Si-rearrangement must be prevented.